S4oC: A Self-optimizing, Self-adapting Secure System-on-Chip Design Framework to Tackle Unknown Threats – A Network Theoretic, Learning Approach

04/05/2020

∙

We propose a framework for the design and optimization of a secure self-optimizing, self-adapting system-on-chip (S4oC) architecture. The goal is to minimize the impact of attacks such as hardware Trojan and side-channel, by making real-time adjustments. S4oC learns to reconfigure itself, subject to various security measures and attacks, some of which possibly unknown at design time. Furthermore, the data types and patterns of the target applications, environmental conditions, and sources of variations are incorporated. S4oC is a manycore system, modeled as a four-layer graph, representing the model of computation (MoCp), model of connection (MoCn), model of memory (MoM) and model of storage (MoS), with a large number of elements including heterogeneous reconfigurable processing elements in MoCp, and memory elements in the MoM layer. Security driven community detection, and neural networks are utilized for application task clustering, and distributed reinforcement learning (RL) for task mapping.

READ FULL TEXT

S4oC: A Self-optimizing, Self-adapting Secure System-on-Chip Design Framework to Tackle Unknown Threats – A Network Theoretic, Learning Approach

Security For System-On-Chip (SoC) Using Neural Networks

Optimizing Memory Placement using Evolutionary Graph Reinforcement Learning

Exploiting Process Variations to Secure Photonic NoC Architectures from Snooping Attacks

Reinforcement Learning for Hardware Security: Opportunities, Developments, and Challenges

Learning Assisted Side Channel Delay Test for Detection of Recycled ICs

IoT Security: On-Chip Secure Deletion Scheme using ECC Modulation in IoT Appliances

System Component-Level Self-Adaptations for Security via Bayesian Games

S4oC: A Self-optimizing, Self-adapting Secure System-on-Chip Design Framework to Tackle Unknown Threats – A Network Theoretic, Learning Approach

Related Research

Security For System-On-Chip (SoC) Using Neural Networks

Optimizing Memory Placement using Evolutionary Graph Reinforcement Learning

Exploiting Process Variations to Secure Photonic NoC Architectures from Snooping Attacks

Reinforcement Learning for Hardware Security: Opportunities, Developments, and Challenges

Learning Assisted Side Channel Delay Test for Detection of Recycled ICs

IoT Security: On-Chip Secure Deletion Scheme using ECC Modulation in IoT Appliances

System Component-Level Self-Adaptations for Security via Bayesian Games