Tuning Streamed Applications on Intel Xeon Phi: A Machine Learning Based Approach

by   Peng Zhang, et al.

Many-core accelerators, as represented by the XeonPhi coprocessors and GPGPUs, allow software to exploit spatial and temporal sharing of computing resources to improve the overall system performance. To unlock this performance potential requires software to effectively partition the hardware resource to maximize the overlap between hostdevice communication and accelerator computation, and to match the granularity of task parallelism to the resource partition. However, determining the right resource partition and task parallelism on a per program, per dataset basis is challenging. This is because the number of possible solutions is huge, and the benefit of choosing the right solution may be large, but mistakes can seriously hurt the performance. In this paper, we present an automatic approach to determine the hardware resource partition and the task granularity for any given application, targeting the Intel XeonPhi architecture. Instead of hand-crafting the heuristic for which the process will have to repeat for each hardware generation, we employ machine learning techniques to automatically learn it. We achieve this by first learning a predictive model offline using training programs; we then use the learned model to predict the resource partition and task granularity for any unseen programs at runtime. We apply our approach to 23 representative parallel applications and evaluate it on a CPU-XeonPhi mixed heterogenous many-core platform. Our approach achieves, on average, a 1.6x (upto 5.6x) speedup, which translates to 94.5 predictor.


Optimizing Streaming Parallelism on Heterogeneous Many-Core Architectures: A Machine Learning Based Approach

This article presents an automatic approach to quickly derive a good sol...

Code modernization strategies for short-range non-bonded molecular dynamics simulations

As modern HPC systems increasingly rely on greater core counts and wider...

HyGCN: A GCN Accelerator with Hybrid Architecture

In this work, we first characterize the hybrid execution patterns of GCN...

Parallelism Resource of Numerical Algorithms. Version 1

The paper is devoted to an approach to solving a problem of the efficien...

Optimizing Sparse Matrix-Vector Multiplication on Emerging Many-Core Architectures

Sparse matrix vector multiplication (SpMV) is one of the most common ope...

SmartWatts: Self-Calibrating Software-Defined Power Meter for Containers

Fine-grained power monitoring of software activities becomes unavoidable...

Invasive Computing - Common Terms and Granularity of Invasion

Future MPSoCs with 1000 or more processor cores on a chip require new me...

Please sign up or login with your details

Forgot password? Click here to reset