SDC-based Resource Constrained Scheduling for Quantum Control Architectures

10/03/2022
by   Razvan Nane, et al.
0

Instruction scheduling is a key transformation in backend compilers that take an untimed description of an algorithm and assigns time slots to the algorithm's instructions so that they can be executed as efficiently as possible while taking into account the target processor limitations, such as the amount of computational units available. For example, for a superconducting quantum processor these restrictions include the amount of analogue instruments available to play the waveforms to drive the qubit rotations or on-chip connectivity between qubits. Current small-scale quantum processors contain only a few qubits; therefore, it is feasible to drive qubits individually albeit not scalable. Consequently, for NISQ and beyond NISQ devices, it is expected that classical instrument sharing to be designed in the future quantum control architectures where several qubits are connected to an instrument and multiplexing is used to activate only the qubits performing the same quantum operation at a time. Existing quantum scheduling algorithms either rely on ILP formulations, which do not scale well, or use heuristic based algorithms such as list scheduling which are not versatile enough to deal with quantum requirements such as scheduling with exact relative timing constraints between instructions, situation that might occur when decomposing complex instructions into native ones and requiring to keep a fixed timing between the primitive ones to guarantee correctness. In this paper, we propose a novel resource constrained scheduling algorithm that is based on the SDC formulation, which is the state-of-the-art algorithm used in the reconfigurable computing. We evaluate it against a list scheduler and describe the benefits of the proposed approach. We find that the SDC-based scheduling is not only able to find better schedules but also model flexible relative timing constraints.

READ FULL TEXT
research
08/07/2018

eQASM: An Executable Quantum Instruction Set Architecture

Bridging the gap between quantum software and hardware, recent research ...
research
08/25/2017

An Experimental Microarchitecture for a Superconducting Quantum Processor

Quantum computers promise to solve certain problems that are intractable...
research
09/02/2020

Quingo: A Programming Framework for Heterogeneous Quantum-Classical Computing with NISQ Features

Noisy Intermediate-Scale Quantum (NISQ) technology proposes requirements...
research
04/12/2011

Deterministic Real-time Thread Scheduling

Race condition is a timing sensitive problem. A significant source of ti...
research
05/23/2023

A Classical Architecture For Digital Quantum Computers

Scaling bottlenecks the making of digital quantum computers, posing chal...
research
08/31/2023

HiSEP-Q: A Highly Scalable and Efficient Quantum Control Processor for Superconducting Qubits

Quantum computing promises an effective way to solve targeted problems t...
research
04/29/2018

Optimal Scheduling for Exposed Datapath Architectures with Buffered Processing Units by ASP

Conventional processor architectures are restricted in exploiting instru...

Please sign up or login with your details

Forgot password? Click here to reset