Field-programmable gate arrays (FPGAs) are widely used to implement deep...
Neural networks achieve state-of-the-art performance in image classifica...
The continued need for improvements in accuracy, throughput, and efficie...
Numerical hardware design requires aggressive optimization, where design...
E-graphs are a data structure that compactly represents equivalent
expre...
Manual optimization of Register Transfer Level (RTL) datapath is commonp...
Recent e-graph applications have typically considered concrete semantics...
The growing proliferation of FPGAs and High-level Synthesis (HLS) tools ...
FPGA-specific DNN architectures using the native LUTs as independently
t...
The ever-growing computational demands of increasingly complex machine
l...
In our recent work on iterative computation in hardware, we showed that
...
Finite-precision floating point arithmetic unavoidably introduces roundi...
Research has shown that deep neural networks contain significant redunda...
Many algorithms feature an iterative loop that converges to the result o...
We consider efficiency in deep neural networks. Hardware accelerators ar...
Research has shown that deep neural networks contain significant redunda...
Deep neural networks have proven to be particularly effective in visual ...