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Featured Co-authors

Nicole Megow
24 publications
Christopher Mutschler
19 publications
Bertrand Simon
13 publications
Stefan Werner
11 publications
Frank Hannig
9 publications
Dietmar Fey
8 publications
Bo Qiao
7 publications
Stefan Wildermann
6 publications
Oliver Keszocze
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Andreas Becher
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∙ 06/22/2023

To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations

Convolutional Neural Networks (CNNs) are widely employed to solve variou...

0 Patrick Plagwitz, et al. ∙

∙ 05/23/2023

Augmented Random Search for Multi-Objective Bayesian Optimization of Neural Networks

Deploying Deep Neural Networks (DNNs) on tiny devices is a common trend ...

0 Mark Deutel, et al. ∙

∙ 06/21/2022

Real-Time Waveform Matching with a Digitizer at 10 GS/s

Side-Channel Analysis (SCA) requires the detection of the specific time ...

0 Jens Trautmann, et al. ∙

∙ 05/20/2022

Deployment of Energy-Efficient Deep Learning Models on Cortex-M based Microcontrollers using Deep Compression

Large Deep Neural Networks (DNNs) are the backbone of today's artificial...

11 Mark Deutel, et al. ∙

∙ 05/11/2022

Raw Filtering of JSON Data on FPGAs

Many Big Data applications include the processing of data streams on sem...

0 Tobias Hahn, et al. ∙

∙ 04/05/2022

Efficient Table-based Function Approximation on FPGAs using Interval Splitting and BRAM Instantiation

This paper proposes a novel approach for the generation of memory-effici...

0 Chetana Pradhan, et al. ∙

∙ 03/23/2022

Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks

Spiking Neural Networks (SNNs) compute in an event-based matter to achie...

0 Jan Sommer, et al. ∙

∙ 03/21/2022

DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks

The number of Digital Signal Processor (DSP) resources available in Fiel...

0 Jan Sommer, et al. ∙

∙ 05/12/2021

On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains

In this paper, we present a multiplier based on a sequence of approximat...

0 Jorge Echavarria, et al. ∙

∙ 01/12/2021

Symbolic Loop Compilation for Tightly Coupled Processor Arrays

Loop compilation for Tightly Coupled Processor Arrays (TCPAs), a class o...

0 Michael Witterauf, et al. ∙

∙ 08/26/2020

HipaccVX: Wedding of OpenVX and DSL-based Code Generation

Writing programs for heterogeneous platforms optimized for high performa...

0 M. Akif Özkan, et al. ∙

∙ 04/20/2020

Secure Boot from Non-Volatile Memory for Programmable SoC Architectures

In modern embedded systems, the trust in comprehensive security standard...

0 Franz-Josef Streit, et al. ∙

∙ 12/19/2019

Energy Minimization in DAG Scheduling on MPSoCs at Run-Time: Theory and Practice

Static (offline) techniques for mapping applications given by task graph...

0 Bertrand Simon, et al. ∙

∙ 10/18/2019

Efficient Computation of Probabilistic Dominance in Robust Multi-Objective Optimization

Real-world problems typically require the simultaneous optimization of s...

0 Faramarz Khosravi, et al. ∙

∙ 07/05/2019

Adaptive Predictive Power Management for Mobile LTE Devices

Reducing the energy consumption of mobile phones is a crucial design goa...

0 Peter Brand, et al. ∙

∙ 05/31/2019

Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems

Composable many-core systems enable the independent development and anal...

0 Behnaz Pourmohseni, et al. ∙

∙ 11/16/2017

A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs

Executing multiple applications on a single MPSoC brings the major chall...

0 Andreas Weichslgartner, et al. ∙

∙ 07/25/2017

Optimizing Scrubbing by Netlist Analysis for FPGA Configuration Bit Classification and Floorplanning

Existing scrubbing techniques for SEU mitigation on FPGAs do not guarant...

0 Bernhard Schmidt, et al. ∙

∙ 02/26/2015

Automatic Optimization of Hardware Accelerators for Image Processing

In the domain of image processing, often real-time constraints are requi...

0 Oliver Reiche, et al. ∙

∙ 08/20/2014

Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs

Multiresolution Analysis (MRA) is a mathematical method that is based on...

0 Moritz Schmid, et al. ∙

∙ 05/08/2014

Proceedings of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014)

This volume contains the papers accepted at the 1st Workshop on Resource...

0 Frank Hannig, et al. ∙

∙ 04/22/2013

Invasive Computing - Common Terms and Granularity of Invasion

Future MPSoCs with 1000 or more processor cores on a chip require new me...

0 Jürgen Teich, et al. ∙

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