Konstantinos Kanellopoulos | DeepAI

AI Chat

Featured Co-authors

Onur Mutlu
199 publications
Torsten Hoefler
137 publications
Juan Gomez-Luna
59 publications
Saugata Ghose
48 publications
Maciej Besta
46 publications
Gagandeep Singh
42 publications
Hasan Hassan
36 publications
Mohammed Alser
35 publications
Lois Orosa
28 publications
Jeremie S. Kim
27 publications
Rachata Ausavarungnirun
25 publications

∙ 12/13/2022

ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems

Partitioning applications between NDP and host CPU cores causes inter-se...

0 Nika Mansouri-Ghiasi, et al. ∙

∙ 11/22/2022

Utopia: Efficient Address Translation using Hybrid Virtual-to-Physical Address Mapping

The conventional virtual-to-physical address mapping scheme enables a vi...

0 Konstantinos Kanellopoulos, et al. ∙

∙ 10/16/2022

RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory

Recent nano-technological advances enable the Monolithic 3D (M3D) integr...

0 Nika Mansouri-Ghiasi, et al. ∙

∙ 09/01/2022

Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction

Long-latency load requests continue to limit the performance of high-per...

18 Rahul Bera, et al. ∙

∙ 06/01/2022

PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques

DRAM-based main memory is used in nearly all computing systems as a majo...

0 Ataberk Olgun, et al. ∙

∙ 05/12/2022

SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping

A critical step of genome sequence analysis is the mapping of sequenced ...

0 Damla Senol Cali, et al. ∙

∙ 02/04/2022

EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators

Dilated and transposed convolutions are widely used in modern convolutio...

15 Lois Orosa, et al. ∙

∙ 10/29/2021

PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM

Processing-using-memory (PuM) techniques leverage the analog operation o...

0 Ataberk Olgun, et al. ∙

∙ 09/24/2021

Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning

Past research has proposed numerous hardware prefetching techniques, mos...

25 Rahul Bera, et al. ∙

∙ 05/17/2021

MetaSys: A Practical Open-Source Metadata Management System to Implement and Evaluate Cross-Layer Optimizations

This paper introduces the first open-source FPGA-based infrastructure, M...

0 Nandita Vijaykumar, et al. ∙

∙ 04/15/2021

SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems

Simple graph algorithms such as PageRank have been the target of numerou...

0 Maciej Besta, et al. ∙

∙ 02/11/2021

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

Aggressive memory density scaling causes modern DRAM devices to suffer f...

0 Abdullah Giray Yağlıkçı, et al. ∙

∙ 05/19/2020

The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework

Computers continue to diversify with respect to system designs, emerging...

0 Nastaran Hajinazar, et al. ∙

∙ 10/23/2019

SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations

Important workloads, such as machine learning and graph analytics applic...

0 Konstantinos Kanellopoulos, et al. ∙

∙ 10/12/2019

EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM

The effectiveness of deep neural networks (DNN) in vision, speech, and l...

0 Skanda Koppula, et al. ∙

Are you a researcher?
Expose your work
to one of the largest
A.I. communities in the world